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84 UEC Int’l Mini-Conference No.53

An evaluation of multi-core and V extension RISC-V processor

The-Binh NGUYEN*, Trong-Thuc HOANG, Cong-Kha PHAM
Department of Computer Network and Engineering
The University of Electro-Communications, Tokyo, Japan

Keywords: Parallel Computing, RISC-V, RISC-V Vector Extension, SIMD

1. Introduction The Table 3 shows the number of cycles taken for a single
Multi-core processing and SIMD are two orthogonal yet image conversion and recognition, the speedup for simple
closely related type of parallel computing. The RISC-V is an image processing task like color to grayscale image only has
open ISA that both support multi-core and SIMD via V 20.77x speedup while the more complex neural network
extension [1]. This openness nature enables flexibility yet inference, we achieve nearly 300x speedup compared to the
difficult to select to optimal configuration for a particular task. scalar core when the data are already in cache.
This work proposes a method to evaluate a RISC-V multi-core
or RISC-V with V extension.
2. Method
For the multi-core RISC-V SoC, we utilize the Chipyard
framework to generate various of RISC-V multi-core
configuration on the VC707 target FPGA evaluation board. The
benchmark that we used are Coremark [2] and Gunrock [3]
graph-coloring algorithm.

Figure 2: Handwritten hiragana recognition
4. Conclusion
From the benchmarking result, we can see that for some
workload that are task-based such as the Coremark or
Gunrock algorithm, the multi-core system does provide the
For the RISC-V with Vector Extension we implement a simple promising speedup. However, for the data-based workload,
multi-cycle processor with Zve32x sub extension, the vector providing the processor with the new extension might
length VLEN is 128-bit. Regarding evaluation, we use an
image processing task and neural network inference, namely improve the performance significantly without the cost of
color to grayscale and handwritten letter, respectively. more complex bus and system architecture to handle the
3. Results multi-processing.
The Table 1 and Table 2 shows the Gunrock and Coremark References
benchmark result on a RV64GC with varying number of cores [1] RISC-V “V” Vector Extension,
from single-core to octa-core under the Linux operating system. https://github.com/riscvarchive/riscv-v-spec/blob/master/v
The Coremark seems to scale linearly yet the Gunrock limits at spec.adoc
5.84x for octa-core. [2] Coremark benchmark, https://github.com/eembc/coremark
[3] A. Borione, L. Cardone, A. Calabrese and S. Quer, "An
Experimental Evaluation of Graph Coloring Heuristics on
Multi- and Many-Core Architectures," in IEEE Access, vol.
11, pp. 125226-125243, 2023,
https://ieeexplore.ieee.org/document/10304117

*The author is supported by SESS MEXT Scholarship