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UEC Int’l Mini-Conference No.53                                                               53









                   Implementation of ASCON Lightweight Cryptography for IoT

                                                    Applications


                        Khai-Duy NGUYEN , Cong-Kha PHAM            ∗  , and Trong-Thuc HOANG    ∗
                                              ∗
                                   Department of Computer and Network Engineering
                                  ∗
                                       The University of Electro-Communications
                                                      Tokyo, Japan


             Keywords: RISC-V, System-on-Chip, ASCON, Lightweight Cryptocraphy.



                                                        Abstract
                    The number of IoT devices has grown significantly in recent years, and edge computing in IoT is
                 considered a new and growing trend in the technology industry. While cryptography is widely used to
                 enhance the security of IoT devices, it also carries limitations such as resource constraints or latency.
                 Therefore, lightweight cryptography (LWC) balances commensurate resource usage and maintaining
                 security while minimizing system costs. The ASCON stands out among the LWC algorithms as a
                 potential target for implementation and cryptoanalysis. It provides authenticated encryption with
                 associated data (AEAD) and hashing functionalities in many variants, aiming for various applications.
                 In this brief, we present an implementation of ASCON cryptography as a peripheral of a RISC-V
                 System-on-a-Chip (SoC). The ASCON crypto core occupies 1,424 LUTs in FPGA and 17.4kGE in
                 180nm CMOS technology while achieving 417Gbits/J energy efficiency at a supply voltage of 1.0V and
                 frequency of 2MHz.


































               ∗ The author is supported by (AiQuSci) MEXT Scholar-
             ship.
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